ao486: An Open-Source Verilog Core That Runs Windows 95 and Linux on an FPGA
ao486: x86-compatible Verilog core implementing all features of a 486 SX (2014)
The ao486 project implements a full 486 SX processor in Verilog, complete with an SoC that can boot Linux 3.13 and Windows 95. It features a 4-stage pipeline, 16 kB instruction and data caches, and a 32-entry TLB. The SoC includes IDE, floppy, PIC, DMA, Sound Blaster 2.0, VGA, and more, all integrated via Altera Qsys. Currently targeting the Terasic DE2-115 board, it achieves 39 MHz and runs MS-DOS, Windows for Workgroups, and Windows 95.
The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.
- nizmow
It’s a neat core, but z386 is where the action is right now (https://github.com/nand2mario/z386_MiSTer). Interestingly this core doesn’t output a proper analogue signal. I always wondered why until I recently tried to implement a real EGA pixel clock on the PCXT EGA core. Basically, video cards with dual (or more) pixel clocks are not realistic on MiSTer. The PLLs are there, but once you get too many clock sources the routing becomes quickly impossible. MiSTer framework’s pipeline also forces pixel clocks tied directly to video output (for good reason) and switching that clock at runtime gets very tricky.
- allenrb
Curious: are these cores (ao486, z386) technically illegal because of Intel/AMD licensing/copyright/etc? Or has everything relevant expired? Surely the patents have but not sure what else comes into play.