A working RISC-V CPU compiled directly into Qwen3.5's weights

Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5

A working RISC-V CPU compiled directly into Qwen3.5's weights

Qwenputer takes a stock Qwen 3.5 4B and compiles a full 32-bit RISC-V core into its weights, using the model's own Gated DeltaNet layers as exact RAM by forcing the gate and write strength to 1 with one-hot addressing. The CPU runs entirely inside forward passes, needs no tool calls or sandbox, passes the official riscv-tests, matches qemu, and has executed 18 million instructions with zero errors. It also carries a small persistent in-model filesystem.

To be very clear, it is not a plugin, a tool or a sandbox.
  1. jchook

    Has nobody figured out how to achieve the same results with multimodal LLMs in other domains? Is the problem lack of training data??

  2. tiborsaas

    This is fun and games, but wait until an agents finds this and does the most misaligned thing with it in order to fold paper clips.

    > Because a CPU inside a language model clearly wasn't cursed enough, I decided the prudent thing would be to give it a filesystem too.

    Love the spirit :)

  3. baq

    Not too far fetched to say this potentially solves continual learning, which is a scary prospect. Wonder what ram and disk prices will go to once every model needs its own long term memory capacity and not just weights and cache.

    I had an idea of splicing a z3 solver into the weights of a sufficiently smart model after the first chatgpt release in what feels like a glaciation event ago so the things could do logic and literally make no mistakes. Was never in a position to follow up. We’re almost here now.

  4. jerrythegerbil

    There was an interesting bit of research that qwen has a single neuron that makes it “demonic evil qwen” and a simple “Who are you?” will get some absolutely terrifyingly vile results.

    Anyways, what I’m trying to say is I want evil qwen to be my CPU.

  5. giveexamples

    https://www.percepta.ai/blog/can-llms-be-computers

    They implemented wasm in transformer with cpu decoding for the wasm part.

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2026-10-29