IBM's z18 Mainframe Runs Both z/Architecture and Arm
Interviewing IBM's Christian Zoellin and Christian Jacobi
At Hot Chips 2026, IBM revealed its next-generation z/Architecture processor (z18) that also executes Arm instructions, a first for the mainframe. Christian Zoellin, core design team leader, and Christian Jacobi, CTO of Systems Development, explain how the dual-ISA design shares most hardware, handles endianness and memory ordering, and why adding Arm opens new use cases like workload consolidation and AI-driven document processing. They also discuss the new Spyre accelerator with HBM and IBM's reliability strategies.
RISC has to do all the operations on the register set, and as such, they just have many more instructions for all these substeps, and things that for us are one large instruction in a RISC instruction set architecture are usually programs that execute hundreds of instructions to do the same task.