Is x86 Ready to ACE It? The New AI Acceleration Standard
I explore how Intel's new ACE extension evolves beyond AMX to accelerate AI workloads using outer products and flexible data types. Unlike Arm's SME, ACE leverages fixed-width vectors for superior handling of quantized model weights and block scaling. This shift aims to make x86 CPUs a more competitive, low-latency alternative to GPUs for machine learning tasks.
We have historically mostly used inner products because that reduces the amount of state we need to keep in registers, and since that is a precious resource that has been important to optimise for.
- usrusr
Will the workloads exist? As in not going straight to something at least as dedicated as the Strix Halo CPU/GPU combo (with air quotes around the G)? Or the Apple max? Somehow I don't picture this as an attempt to make a full AI rig that just happens to be x86 in the housekeeping parts but just something that will make CPU inference a little less bad. In that case it would at best be a hedge against some low requirements use case becoming more important than expected, yet another unused spec sheet checkbox engineering marvel otherwise.
- ksec
I assume Zen 6 won't support these, so we are looking Zen 7 at the earliest, which is 2028 earliest.
In the meantime x86 don't have much in the roadmap that compete well with ARM vendor's offering. And that was before Nvidia decided to join the fight.
- AussieWog93
This all went over my head, but does anyone know either how much faster this will make things (4x faster than AVX512 at 2048-bit??), and if unified memory plus a basic GPU will render this dead in the water?
- aidenn0
With 8kb of registers for just this one feature, what does a modern process-control-block look like?
- supriyo-biswas
Great article. What does the (organizational) process look like to convert one of these specs to a processor product, does it go through a committee like the C++ standards?