The Cambrian Explosion of AI Chip Architectures

Since John Hennessy and David Patterson's 2018 Turing Lecture predicted a Cambrian explosion of domain-specific architectures, the landscape has delivered: GPUs, TPUs, LPUs, NPUs, DPUs, ASICs, wafer-scale engines, and more. This survey examines the philosophies, architectures, scaling methods, and software stacks of the key contenders—NVIDIA, AMD, Google, Amazon, Cerebras, and Groq—focusing on how each tackles the memory wall and the shift from matrix-matrix to matrix-vector operations in AI inference.
The architecture problem here is moving the numbers to where the matmuls happens fast enough.