RISC-V's Open ISA Isn't the Hard Part—Credibility Is
How do you sell a CPU design when the instruction set is free?
In this interview, Fiora 5 CEO Darian Damikos explains why his startup chose RISC-V over ARM: the open instruction set lets them prototype faster and avoid licensing hurdles. But the real challenge for any new CPU design is earning customer trust. Fiora 5 targets low-power, high-performance edge devices like smart glasses and wearables, avoiding the crowded cloud market. They plan to fund automotive-grade certification later. Damikos also discusses the open-source toolchain advantage and why their proprietary microarchitecture remains the key IP.
You can make the best hardware there is if the software can't run on top of it. It's pretty much useless.
- wildzzz
By adding a bunch of IP blocks that do stuff the open ISA doesn't, like peripherals or multicore processing. It also helps if you can make it high throughout, low latency, or low power by adjusting some "knobs".
- RealityVoid
The article is quite weak, to be honest. Which is a shame, sillicon IP design is quite an interesting domain and it would deserve better coverage.
I was pleasantly surprised it's a startup done by two of my conationals.
- akoboldfrying
The HN article title suggests a contradiction where there isn't one. The instruction set is just the spec -- the high-level contract that the silicon must implement, with many important details like cycle counts per instruction left unspecified. It implies very little about how you would actually implement the inner workings, which could be done in an almost infinite number of different ways (including simulating them on some completely different architecture). Compare "How do you sell a calculator design when the rules of arithmetic are free?"