OberonSystem RV32 - Project Oberon on RISC-V
Show HN: A Project Oberon System version running on RISC-V instead of RISC-5
OberonSystem RV32 brings the classic Project Oberon System to modern RISC-V hardware by migrating the original Oberon-07 code to Oberon 90 and compiling it with the OP2 compiler. It runs on a custom RISC-V virtual machine that faithfully reproduces Wirth's original memory map, allowing unchanged Kernel, Display, and Input modules. This project preserves the simplicity and elegance of the original system while making it accessible on contemporary, low-cost microcontrollers like the ESP32. It's a perfect starting point for exploring operating system design, compiler construction, and embedded systems.
Migrating the Project Oberon System from RISC-5 to RISC-V is a pragmatic way to bring the system to widely available contemporary hardware while preserving the principles that make Oberon valuable.